In recent years, there is an increasing demand for a low-voltage, high-speed, and low-power-consumption analog signal processing circuit. Therefore, the use of a technique has recently become a main stream in which a switched capacitor arrangement which is a combination of a CMOS analog circuit amplifier and a capacitor is employed to secure a dynamic range and enable a high-speed operation using a low power supply voltage.
On the other hand, regarding analog-digital interface techniques, ADCs (analog-to-digital converters) for general-purpose applications which have higher performance, such as an improved resolution, higher speed and the like, have been developed. Therefore, the performance of analog processing before the ADC is critical to the system performance.
For example, in an analog front-end circuit of a camera module of a mobile telephone, an increase in processing speed with an increase in the number of pixels in an image sensor, the expansion of the dynamic range, or an improvement in precision of analog signal processing with an increase in the number of bits of the ADC leads to a deterioration in image quality during low-illuminance shooting, for example, when a black level offset is insufficiently removed, so that it is important to increase the precision of a comparator for detecting a black level offset.
Specifically, for example, in an 10-bit ADC having a dynamic range of 1 V, the quantization level of the ADC is smaller than 1 mV, so that an offset of as small as about 60 μV cannot be tolerated in the input section, taking into consideration the amplification factor of the analog front-end.
As the product range of such a camera module project, the field of surveillance cameras, such as security cameras, in-car cameras and the like, has currently attracted attention, and advanced technologies have been developed.
Particularly, in in-car cameras, an improvement in sensitivity of an image sensor, a high amplification factor, a wide dynamic range, and high-precision analog signal processing are required so as to enhance the nighttime surveillance capability. Whereas higher performance has been desired mainly for the purpose of an improvement in image quality of still images in mobile telephone cameras or digital cameras, an even higher-speed operation is required for real-time processing of moving images. Further, it is easily expected that the number of pixels in an image sensor mounted is increased.
Therefore, it is considered that a technique of processing a differential analog signal having a wide dynamic range with high precision and high speed will be required in the future, and in addition, more importance will be put on lower power consumption with further penetration of hybrid cars, an increase in in-car electronic apparatuses, or the like.
To date, the following techniques have been known as techniques relating to fully differential comparators and amplifier circuits.
A first conventional technique is such that an input portion of a comparator is configured at a differential input stage to detect a difference by successively switching a voltage to be applied to a chopper capacitance between a differential comparison reference voltage and a differential input signal voltage using a switch (see Patent Document 1).
A second conventional technique is such that a differential comparison reference voltage and a differential input signal voltage are input to the gate of a differential comparison stage transistor by DC connection without using a chopper capacitance, and both the voltages are short-circuited using a switch at each of positive and negative sides, thereby detecting a difference (see Patent Document 2).
A third conventional technique is such that an input portion of a comparator is configured so that capacitances for separately sampling an input signal voltage and a comparison reference voltage are connected in parallel to positive and negative sides of a differential so that, during a comparison operation, both positive-and negative-side voltages are short-circuited using a switch to detect a difference (see Patent Document 3).
Patent Document 1: Japanese Unexamined Patent Application Publication No. H10-107600
Patent Document 2: Japanese Unexamined Patent Application Publication No. H11-150454
Patent Document 3: Japanese Unexamined Patent Application Publication No. 2002-374153